CVE-2025-0647: High severity Arm C1-ultra Firmware vulnerability
In certain Arm CPUs, a CPP RCTX instruction executed on one Processing Element (PE) may inhibit TLB invalidation when a TLBI is issued to the PE, either by the same PE or another PE in the shareability domain. In this case, the PE may retain stale TLB entries which should have been invalidated by the TLBI.
Affected Software
Event History
Frequently Asked Questions
What is the severity of CVE-2025-0647?
CVE-2025-0647 is considered a high-severity vulnerability due to potential impacts on memory integrity and security.
How do I fix CVE-2025-0647?
To mitigate CVE-2025-0647, users should update to the latest firmware versions released by Arm for the affected CPUs.
Which Arm CPUs are affected by CVE-2025-0647?
CVE-2025-0647 affects several Arm CPUs including C1-ultra, C1-premium, Cortex-a710, Cortex-x2, Cortex-x3, Cortex-x4, Cortex-x925, and various Neoverse models.
What is the impact of CVE-2025-0647 on system security?
The impact of CVE-2025-0647 could lead to retention of stale Translation Lookaside Buffer (TLB) entries, posing risks for memory data integrity.
Is CVE-2025-0647 exploitable remotely?
CVE-2025-0647 primarily impacts local processing elements and is not directly exploitable remotely, but it can create broader security concerns.