CVE-2025-21895: perf/core: Order the PMU list to fix warning about unordered pmu_ctx_list

In the Linux kernel, the following vulnerability has been resolved:

perf/core: Order the PMU list to fix warning about unordered pmuctxlist

Syskaller triggers a warning due to prevepc->pmu != nextepc->pmu in perfeventswaptaskctxdata(). vmcore shows that two lists have the same perfeventpmucontext, but not in the same order.

The problem is that the order of pmuctxlist for the parent is impacted by the time when an event/PMU is added. While the order for a child is impacted by the event order in the pinnedgroups and flexiblegroups. So the order of pmuctxlist in the parent and child may be different.

To fix this problem, insert the perfeventpmucontext to its proper place after iteration of the pmuctxlist.

The follow testcase can trigger above warning:

# perf record -e cycles --call-graph lbr -- taskset -c 3 ./a.out & # perf stat -e cpu-clock,cs -p xxx // xxx is the pid of a.out

test.c

void main() { int count = 0; pidt pid;

printf("%d running\n", getpid()); sleep(30); printf("running\n");

pid = fork(); if (pid == -1) { printf("fork error\n"); return; } if (pid == 0) { while (1) { count++; } } else { while (1) { count++; } } }

The testcase first opens an LBR event, so it will allocate taskctxdata, and then open tracepoint and software events, so the parent context will have 3 different perfeventpmucontexts. On inheritance, child ctx will insert the perfeventpmucontext in another order and the warning will trigger.

[ mingo: Tidied up the changelog. ]