CVE-2026-89916: KVM: arm64: Make VNCR invalidation participate in MMU invalidation retry

Published Sep 16, 2026
·
Updated

In the Linux kernel, the following vulnerability has been resolved:

KVM: arm64: Make VNCR invalidation participate in MMU invalidation retry

A VNCR TLB invalidation can occur on one vcpu while another vcpu is faulting in this same page. Without correctly handling this, we can end up with the following scenario:

- vcpu A walks the PTs to translate VNCR - before vcpu A is able to grab the MMU lock to insert the TLB, vcpu B updates the S1 PTs with an invalid entry, and issues a TLBI S1E2 for this VA - vcpu A inserts the TLB for something that is now invalid

This isn't a new problem, and we manage S2 by having the MMU notifier to bump up mmuinvalidateseq on invalidation so that the fault can be replayed.

We can perform something similar here, and extend invalidatevncrva() to update the same counter, clearly indicating that the context has changed under our feet. This is safe as the invalidation always happen while holding the MMU lock for write, and that we sample the sequence number before walking S1.

Event History

Sep 16, 2026
CVE Published
via MITRE·10:32 AM
Data Sourced
via MITRE·10:32 AM
Description

Frequently Asked Questions

1

Which environments are exposed to this race?

The issue is relevant to Linux kernel KVM on arm64 systems using VNCR, where multiple virtual CPUs can concurrently access the same VNCR page.

2

What conditions are required for the stale translation to be installed?

One vCPU must be translating the VNCR page while another vCPU updates the stage-1 page tables with an invalid entry and issues a S1E2 TLB invalidation for the same virtual address before the first vCPU inserts its TLB entry.

3

What does the resolved change do?

VNCR invalidations now advance the MMU invalidation sequence counter. A fault that observed an earlier sequence can then be retried instead of installing a translation that has become invalid.

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