CVE-2026-97578: media: verisilicon: rockchip: guard VPU981 AV1 divisor and tile buffer

Published Sep 25, 2026
·
Updated

In the Linux kernel, the following vulnerability has been resolved:

media: verisilicon: rockchip: guard VPU981 AV1 divisor and tile buffer

rockchipvpu981av1decsettileinfo() divides contextupdatetileid by tileinfo->tilecols and writes one descriptor per tile into the tileinfo DMA buffer, which holds AV1MAXTILES entries; tilecols and tilerows come from the bitstream. Guard the division against a zero tilecols by initialising the context-update values to zero and computing them only when tilecols is non-zero, and stop the descriptor writes once the tileinfo buffer is full. The tile geometry written to the hardware registers is left unmodified; the per-dimension and total tile bounds are enforced by the control validation.

Affected Software

1 affected component
Linux Linux kernel

Remediation

Recommended actions to resolve this vulnerability, in priority order.

  1. Compensating control

    In rockchip_vpu981_av1_dec_set_tile_info(), guard the division by tile_info->tile_cols against zero, initialize context-update values to zero and compute them only when tile_cols is non-zero, validate the per-dimension and total tile bounds, and stop descriptor writes when the DMA tile_info buffer is full.

Event History

Sep 25, 2026
CVE Published
via MITRE·10:22 AM
Data Sourced
via MITRE·10:22 AM
Description
Data Sourced
via NVD·11:17 AM
DescriptionSeverity

Frequently Asked Questions

1

What input is required to trigger the issue?

An attacker would need to supply an AV1 bitstream with tile geometry that causes tile_cols to be zero or causes descriptor generation to exceed the fixed AV1_MAX_TILES tile-info DMA buffer.

2

Which systems are exposed?

Exposure is limited to Linux kernel systems using the Rockchip VPU981 AV1 decoder path that processes attacker-controlled or otherwise untrusted AV1 bitstreams.

3

Are the hardware tile-geometry registers also protected by this change?

The change does not modify the tile geometry written to hardware registers. The description states that per-dimension and total tile bounds for that geometry are enforced by control validation.

4

How can I determine whether my kernel includes the fix?

Check whether the kernel source includes the referenced stable commits or equivalent changes that avoid computing context-update values when tile_cols is zero and stop tile-info descriptor writes when the DMA buffer is full.

Contact

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