GHSA-p882-92qp-g6jr: Out-of-bounds write in the Nuvoton NPCX eSPI Target-Attached-Flash receive path from an unvalidated host-supplied packet length

Published Oct 21, 2026
·
Updated

The Nuvoton NPCX eSPI driver parses Target-Attached-Flash (TAF) requests in espitafparse() (drivers/espi/espinpcx.c), taking the 12-bit length field directly out of the request header in the FLASHRXBUF FIFO. For write and RPMC OP1 requests it copied DIVROUNDUP(len, 4) words into struct espitafpckt.src, a fixed 16-word (64-byte) member of a static structure, without ever comparing the length against that buffer or against the negotiated eSPI receive payload size (rx-plsize, 64 bytes on all in-tree NPCX/NPCK SoCs). Both the loop counter and the word count were uint8t, so the copy ran up to 255 iterations.

An eSPI controller that emits a flash request whose header claims a payload larger than the negotiated maximum therefore drives up to 239 32-bit stores past the end of the structure — roughly 956 bytes of out-of-bounds write into .bss — from the eSPI flash receive interrupt handler, while the source reads walk past the end of the 18-word FLASHRXBUF register array into neighbouring eSPI registers. The same unvalidated length was then passed on to flashwrite() in espitafnpcxflashwrite() with the 64-byte src buffer as source, reading up to 4 KB of adjacent controller SRAM into SPI flash at a host-chosen address, where the host can read it back. A related fixed-size stack buffer in tafnpcxcompletionhandler() was overflowed by four bytes on the maximum-size completion path on SoCs whose tx-plsize is 64.

The defect is reachable only from the eSPI host side, and only by a request that violates the negotiated payload size, so it requires host firmware or bus-level control rather than ordinary host software; a compliant maximum-length write fits the buffer exactly and is handled correctly. Because TAF exists specifically so that the embedded controller arbitrates host access to shared flash (espitafcheckreadprotect() / espitafcheckwriteprotect()), corrupting controller memory from a host-supplied field crosses the trust boundary the feature asserts; consequences range from controller crash or hang to corruption of driver state that gates the flash protection regions.

The fix widens the counters, rejects any request whose word count exceeds both ARRAYSIZE(FLASHRXBUF) - NPCXESPIFLASHHEADERADDRESSLEN and NPCXTAFRXPAYLOADWORDS (derived from the devicetree rx-plsize), marks such packets with a new invalidflag so espitafwork() answers them with an unsuccessful completion instead of processing them, bounds the transmit payload against FLASHTXBUF, and adds a default case for unsupported cycle types. Only configurations with CONFIGESPITAF enabled on an NPCX/NPCK target are affected; no in-tree board enables it by default.

Affected Software

1 affected component
Zephyr Project Zephyr RTOS

Event History

Oct 21, 2026
CVE Published
via OSV·06:19 PM
Data Sourced
via OSV·06:19 PM
DescriptionSeverityWeakness

Contact

SecAlerts Pty Ltd.
132 Wickham Terrace
Fortitude Valley,
QLD 4006, Australia
info@secalerts.co
By using SecAlerts services, you agree to our services end-user license agreement. This website is safeguarded by reCAPTCHA and governed by the Google Privacy Policy and Terms of Service. All names, logos, and brands of products are owned by their respective owners, and any usage of these names, logos, and brands for identification purposes only does not imply endorsement. If you possess any content that requires removal, please get in touch with us.
© 2026 SecAlerts Pty Ltd.
ABN: 70 645 966 203, ACN: 645 966 203