UBUNTU-CVE-2025-68773: Buffer Overflow
In the Linux kernel, the following vulnerability has been resolved: spi: fsl-cpm: Check length parity before switching to 16 bit mode Commit fc96ec826bce ("spi: fsl-cpm: Use 16 bit mode for large transfers with even size") failed to make sure that the size is really even before switching to 16 bit mode. Until recently the problem went unnoticed because kernfs uses a pre-allocated bounce buffer of size PAGESIZE for reading EEPROM. But commit 8ad6249c51d0 ("eeprom: at25: convert to spi-mem API") introduced an additional dynamically allocated bounce buffer whose size is exactly the size of the transfer, leading to a buffer overrun in the fsl-cpm driver when that size is odd. Add the missing length parity verification and remain in 8 bit mode when the length is not even.
Affected Software
Remediation
Recommended actions to resolve this vulnerability, in priority order.
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ubuntu/linux-gcp-fipsto a version that resolves this vulnerability.Fixed in 6.8.0-1054.57+fips1 - Upgrade
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ubuntu/linuxto a version that resolves this vulnerability.Fixed in 6.17.0-22.22 - Upgrade
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ubuntu/linux-awsto a version that resolves this vulnerability.Fixed in 6.17.0-1012.12 - Upgrade
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ubuntu/linux-azureto a version that resolves this vulnerability.Fixed in 6.17.0-1013.13 - Upgrade
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ubuntu/linux-oracleto a version that resolves this vulnerability.Fixed in 6.17.0-1011.11 - Upgrade
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ubuntu/linux-raspito a version that resolves this vulnerability.Fixed in 6.17.0-1013.13 - Upgrade
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ubuntu/linux-realtimeto a version that resolves this vulnerability.Fixed in 6.17.0-1010.11 - Upgrade
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ubuntu/linux-riscvto a version that resolves this vulnerability.Fixed in 6.17.0-22.22.1 - Compensating control
In the fsl-cpm SPI driver, verify transfer-length parity before switching to 16-bit mode, and remain in 8-bit mode when the length is odd to prevent buffer overruns.
Event History
Frequently Asked Questions
Which systems are realistically exposed to this issue?
Systems using the affected Ubuntu kernel packages and the Freescale CPM SPI driver are exposed when that driver processes an odd-sized transfer that would otherwise be switched to 16-bit mode. The described trigger involves EEPROM reads through the at25 driver after its conversion to the spi-mem API.
What is required to trigger the buffer overrun?
An odd-length SPI transfer must reach the fsl-cpm driver in the path where it selects 16-bit mode for large transfers. The overrun occurs because the transfer buffer can be allocated to exactly the odd transfer length.
What mitigation is available if an updated kernel cannot be deployed immediately?
The described safe behavior is to keep odd-length transfers in 8-bit mode rather than switching them to 16-bit mode. No other workaround or configuration-based mitigation is provided in the available data.