Where
-Infinity
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The microcodectl packages provide microcode updates for Intel.<br>Security Fix(es):<br><li> hw: vt-d related privilege escalation (CVE-2020-24489)</li> <li> hw: improper isolation of shared resources in some Intel Processors (CVE-2020-24511)</li> <li> hw: observable timing discrepancy in some Intel Processors (CVE-2020-24512)</li> <li> hw: information disclosure on some Intel Atom processors (CVE-2020-24513)</li> Bug Fix(es) and Enhancement(s):<br><li> Update Intel CPU microcode to microcode-20210525 release</li>

Remedy

<tbody><tr> <th colspan="2">SRPM</th> </tr> <tr> <td class="name"> microcode_ctl-20210216-1.20210525.1.el8_4.src.rpm </td> <td class="checksum">SHA-256: 3aba36287d2958f49991c92a3f3d5bb173783f8144e555a792bf8bf7f53eb9ed</td> </tr> <tr> <th colspan="2">x86_64</th> </tr> <tr> <td class="name"> microcode_ctl-20210216-1.20210525.1.el8_4.x86_64.rpm </td> <td class="checksum">SHA-256: 44bccebd801a24fbdb4cb69ec74a0aed98e47786d27e72d6c39848a69a819c2b</td> </tr> </tbody>Red Hat Enterprise Linux for x86_64 - Update Services for SAP Solutions 8.6 <tbody><tr> <th colspan="2">SRPM</th> </tr> <tr> <td class="name"> microcode_ctl-20210216-1.20210525.1.el8_4.src.rpm </td> <td class="checksum">SHA-256: 3aba36287d2958f49991c92a3f3d5bb173783f8144e555a792bf8bf7f53eb9ed</td> </tr> <tr> <th colspan="2">x86_64</th> </tr> <tr> <td class="name"> microcode_ctl-20210216-1.20210525.1.el8_4.x86_64.rpm </td> <td class="checksum">SHA-256: 44bccebd801a24fbdb4cb69ec74a0aed98e47786d27e72d6c39848a69a819c2b</td> </tr> </tbody>Red Hat Enterprise Linux for x86_64 - Update Services for SAP Solutions 8.4 <tbody><tr> <th colspan="2">SRPM</th> </tr> <tr> <td class="name"> microcode_ctl-20210216-1.20210525.1.el8_4.src.rpm </td> <td class="checksum">SHA-256: 3aba36287d2958f49991c92a3f3d5bb173783f8144e555a792bf8bf7f53eb9ed</td> </tr> <tr> <th colspan="2">x86_64</th> </tr> <tr> <td class="name"> microcode_ctl-20210216-1.20210525.1.el8_4.x86_64.rpm </td> <td class="checksum">SHA-256: 44bccebd801a24fbdb4cb69ec74a0aed98e47786d27e72d6c39848a69a819c2b</td> </tr> </tbody>Red Hat Enterprise Linux for x86_64 - Extended Life Cycle 8.10 <tbody><tr> <th colspan="2">SRPM</th> </tr> <tr> <td class="name"> microcode_ctl-20210216-1.20210525.1.el8_4.src.rpm </td> <td class="checksum">SHA-256: 3aba36287d2958f49991c92a3f3d5bb173783f8144e555a792bf8bf7f53eb9ed</td> </tr> <tr> <th colspan="2">x86_64</th> </tr> <tr> <td class="name"> microcode_ctl-20210216-1.20210525.1.el8_4.x86_64.rpm </td> <td class="checksum">SHA-256: 44bccebd801a24fbdb4cb69ec74a0aed98e47786d27e72d6c39848a69a819c2b</td> </tr> </tbody>
First published (updated )

The microcodectl packages provide microcode updates for Intel.Security Fix(es): hw: Information disclosure issue in Intel SGX via RAPL interface (CVE-2020-8695) hw: Vector Register Leakage-Active (CVE-2020-8696) hw: Fast forward store predictor (CVE-2020-8698) Bug Fix(es) and Enhancement(s): Update Intel CPU microcode to microcode-20201112 release, addresses: Addition of 06-55-0b/0xbf (CPX-SP A1) microcode at revision 0x700001e; Addition of 06-8a-01/0x10 (LKF B2/B3) microcode at revision 0x28; Addition of 06-8c-01/0x80 (TGL-UP3/UP4 B1) microcode at revision 0x68; Addition of 06-a5-02/0x20 (CML-H R1) microcode at revision 0xe0; Addition of 06-a5-03/0x22 (CML-S 6+2 G1) microcode at revision 0xe0; Addition of 06-a5-05/0x22 (CML-S 10+2 Q0) microcode at revision 0xe0; Addition of 06-a6-01/0x80 (CML-U 6+2 v2 K0) microcode at revision 0xe0; Update of 06-4e-03/0xc0 (SKL-U/U 2+3e/Y D0/K1) microcode (in intel-06-4e-03/intel-ucode/06-4e-03) from revision 0xdc up to 0xe2; Update of 06-55-04/0xb7 (SKX-D/SP/W/X H0/M0/M1/U0) microcode (in intel-06-55-04/intel-ucode/06-55-04) from revision 0x2006906 up to 0x2006a08; Update of 06-5e-03/0x36 (SKL-H/S/Xeon E3 N0/R0/S0) microcode (in intel-06-5e-03/intel-ucode/06-5e-03) from revision 0xdc up to 0xe2; Update of 06-8e-09/0x10 (AML-Y 2+2 H0) microcode (in intel-06-8e-9e-0x-dell/intel-ucode/06-8e-09) from revision 0xd6 up to 0xde; Update of 06-8e-09/0xc0 (KBL-U/U 2+3e/Y H0/J1) microcode (in intel-06-8e-9e-0x-dell/intel-ucode/06-8e-09) from revision 0xd6 up to 0xde; Update of 06-8e-0a/0xc0 (CFL-U 4+3e D0, KBL-R Y0) microcode (in intel-06-8e-9e-0x-dell/intel-ucode/06-8e-0a) from revision 0xd6 up to 0xe0; Update of 06-8e-0b/0xd0 (WHL-U W0) microcode (in intel-06-8e-9e-0x-dell/intel-ucode/06-8e-0b) from revision 0xd6 up to 0xde; Update of 06-8e-0c/0x94 (AML-Y 4+2 V0, CML-U 4+2 V0, WHL-U V0) microcode (in intel-06-8e-9e-0x-dell/intel-ucode/06-8e-0c) from revision 0xd6 up to 0xde; Update of 06-9e-09/0x2a (KBL-G/H/S/X/Xeon E3 B0) microcode (in intel-06-8e-9e-0x-dell/intel-ucode/06-9e-09) from revision 0xd6 up to 0xde; Update of 06-9e-0a/0x22 (CFL-H/S/Xeon E U0) microcode (in intel-06-8e-9e-0x-dell/intel-ucode/06-9e-0a) from revision 0xd6 up to 0xde; Update of 06-9e-0b/0x02 (CFL-E/H/S B0) microcode (in intel-06-8e-9e-0x-dell/intel-ucode/06-9e-0b) from revision 0xd6 up to 0xde; Update of 06-9e-0c/0x22 (CFL-H/S/Xeon E P0) microcode (in intel-06-8e-9e-0x-dell/intel-ucode/06-9e-0c) from revision 0xd6 up to 0xde; Update of 06-9e-0d/0x22 (CFL-H/S/Xeon E R0) microcode (in intel-06-8e-9e-0x-dell/intel-ucode/06-9e-0d) from revision 0xd6 up to 0xde; Update of 06-3f-02/0x6f (HSX-E/EN/EP/EP 4S C0/C1/M1/R2) microcode from revision 0x43 up to 0x44; Update of 06-55-03/0x97 (SKX-SP B1) microcode from revision 0x1000157 up to 0x1000159; Update of 06-55-06/0xbf (CLX-SP B0) microcode from revision 0x4002f01 up to 0x4003003; Update of 06-55-07/0xbf (CLX-SP/W/X B1/L1) microcode from revision 0x5002f01 up to 0x5003003; Update of 06-5c-09/0x03 (APL D0) microcode from revision 0x38 up to 0x40; Update of 06-5c-0a/0x03 (APL B1/F1) microcode from revision 0x16 up to 0x1e; Update of 06-7a-01/0x01 (GLK B0) microcode from revision 0x32 up to 0x34; Update of 06-7a-08/0x01 (GLK-R R0) microcode from revision 0x16 up to 0x18; Update of 06-7e-05/0x80 (ICL-U/Y D1) microcode from revision 0x78 up to 0xa0; Update of 06-a6-00/0x80 (CML-U 6+2 A0) microcode from revision 0xca up to 0xe0. Disable 06-8c-01 (TGL-UP3/UP4 B1) microcode update by default. Add README file to the documentation directory. Add publicly-sourced codenames list to supply to genprovides.sh; update the latter to handle the somewhat different format. Add SUMMARY.intel-ucode file

First published (updated )

The microcodectl packages provide microcode updates for Intel.Security Fix(es): hw: Information disclosure issue in Intel SGX via RAPL interface (CVE-2020-8695) hw: Vector Register Leakage-Active (CVE-2020-8696) hw: Fast forward store predictor (CVE-2020-8698) Bug Fix(es) and Enhancement(s): Update Intel CPU microcode to microcode-20201027 release, addresses: Addition of 06-55-0b/0xbf (CPX-SP A1) microcode at revision 0x700001e; Addition of 06-8c-01/0x80 (TGL-UP3/UP4 B1) microcode at revision 0x68; Addition of 06-a5-02/0x20 (CML-H R1) microcode at revision 0xe0; Addition of 06-a5-03/0x22 (CML-S 6+2 G1) microcode at revision 0xe0; Addition of 06-a5-05/0x22 (CML-S 10+2 Q0) microcode at revision 0xe0; Addition of 06-a6-01/0x80 (CML-U 6+2 v2 K0) microcode at revision 0xe0; Update of 06-4e-03/0xc0 (SKL-U/U 2+3e/Y D0/K1) microcode (in intel-06-4e-03/intel-ucode/06-4e-03) from revision 0xdc up to 0xe2; Update of 06-55-04/0xb7 (SKX-D/SP/W/X H0/M0/M1/U0) microcode (in intel-06-55-04/intel-ucode/06-55-04) from revision 0x2006906 up to 0x2006a08; Update of 06-5e-03/0x36 (SKL-H/S/Xeon E3 N0/R0/S0) microcode (in intel-06-5e-03/intel-ucode/06-5e-03) from revision 0xdc up to 0xe2; Update of 06-8e-09/0x10 (AML-Y 2+2 H0) microcode (in intel-06-8e-9e-0x-dell/intel-ucode/06-8e-09) from revision 0xd6 up to 0xde; Update of 06-8e-09/0xc0 (KBL-U/U 2+3e/Y H0/J1) microcode (in intel-06-8e-9e-0x-dell/intel-ucode/06-8e-09) from revision 0xd6 up to 0xde; Update of 06-8e-0a/0xc0 (CFL-U 4+3e D0, KBL-R Y0) microcode (in intel-06-8e-9e-0x-dell/intel-ucode/06-8e-0a) from revision 0xd6 up to 0xe0; Update of 06-8e-0b/0xd0 (WHL-U W0) microcode (in intel-06-8e-9e-0x-dell/intel-ucode/06-8e-0b) from revision 0xd6 up to 0xde; Update of 06-8e-0c/0x94 (AML-Y 4+2 V0, CML-U 4+2 V0, WHL-U V0) microcode (in intel-06-8e-9e-0x-dell/intel-ucode/06-8e-0c) from revision 0xd6 up to 0xde; Update of 06-9e-09/0x2a (KBL-G/H/S/X/Xeon E3 B0) microcode (in intel-06-8e-9e-0x-dell/intel-ucode/06-9e-09) from revision 0xd6 up to 0xde; Update of 06-9e-0a/0x22 (CFL-H/S/Xeon E U0) microcode (in intel-06-8e-9e-0x-dell/intel-ucode/06-9e-0a) from revision 0xd6 up to 0xde; Update of 06-9e-0b/0x02 (CFL-E/H/S B0) microcode (in intel-06-8e-9e-0x-dell/intel-ucode/06-9e-0b) from revision 0xd6 up to 0xde; Update of 06-9e-0c/0x22 (CFL-H/S/Xeon E P0) microcode (in intel-06-8e-9e-0x-dell/intel-ucode/06-9e-0c) from revision 0xd6 up to 0xde; Update of 06-9e-0d/0x22 (CFL-H/S/Xeon E R0) microcode (in intel-06-8e-9e-0x-dell/intel-ucode/06-9e-0d) from revision 0xd6 up to 0xde; Update of 06-3f-02/0x6f (HSX-E/EN/EP/EP 4S C0/C1/M1/R2) microcode from revision 0x43 up to 0x44; Update of 06-55-03/0x97 (SKX-SP B1) microcode from revision 0x1000157 up to 0x1000159; Update of 06-55-06/0xbf (CLX-SP B0) microcode from revision 0x4002f01 up to 0x4003003; Update of 06-55-07/0xbf (CLX-SP/W/X B1/L1) microcode from revision 0x5002f01 up to 0x5003003; Update of 06-5c-09/0x03 (APL D0) microcode from revision 0x38 up to 0x40; Update of 06-5c-0a/0x03 (APL B1/F1) microcode from revision 0x16 up to 0x1e; Update of 06-7a-08/0x01 (GLK-R R0) microcode from revision 0x16 up to 0x18; Update of 06-7e-05/0x80 (ICL-U/Y D1) microcode from revision 0x78 up to 0xa0; Update of 06-a6-00/0x80 (CML-U 6+2 A0) microcode from revision 0xca up to 0xe0. Add README file to the documentation directory. Add publicly-sourced codenames list to supply to genprovides.sh; update the latter to handle the somewhat different format. Add SUMMARY.intel-ucode file containing metadata information from the microcode file headers.

Remedy

<tbody><tr> <th colspan="2">SRPM</th> </tr> <tr> <td class="name"> microcode_ctl-20191115-4.20201112.1.el8_2.src.rpm </td> <td class="checksum">SHA-256: 8b2eb69a43e9beb0851c9aa87dde87d9586e19ac69f5a22b015fee30622c4729</td> </tr> <tr> <th colspan="2">x86_64</th> </tr> <tr> <td class="name"> microcode_ctl-20191115-4.20201112.1.el8_2.x86_64.rpm </td> <td class="checksum">SHA-256: 8e25c870e77083872394fd0ca28c7130d529a62481ecd6602652d71008ebe513</td> </tr> </tbody>
First published (updated )

The microcodectl packages provide microcode updates for Intel.Security Fix(es): hw: Vector Register Leakage-Active (CVE-2020-8696) hw: Fast forward store predictor (CVE-2020-8698) Bug Fix(es) and Enhancement(s): Update Intel CPU microcode to microcode-202010112 release, addresses: Addition of 06-55-0b/0xbf (CPX-SP A1) microcode at revision 0x700001e; Addition of 06-8a-01/0x10 (LKF B2/B3) microcode at revision 0x28; Addition of 06-8c-01/0x80 (TGL-UP3/UP4 B1) microcode at revision 0x68; Addition of 06-a5-02/0x20 (CML-H R1) microcode at revision 0xe0; Addition of 06-a5-03/0x22 (CML-S 6+2 G1) microcode at revision 0xe0; Addition of 06-a5-05/0x22 (CML-S 10+2 Q0) microcode at revision 0xe0; Addition of 06-a6-01/0x80 (CML-U 6+2 v2 K0) microcode at revision 0xe0; Update of 06-4e-03/0xc0 (SKL-U/U 2+3e/Y D0/K1) microcode (in intel-06-4e-03/intel-ucode/06-4e-03) from revision 0xdc up to 0xe2; Update of 06-55-04/0xb7 (SKX-D/SP/W/X H0/M0/M1/U0) microcode (in intel-06-55-04/intel-ucode/06-55-04) from revision 0x2006906 up to 0x2006a08; Update of 06-5e-03/0x36 (SKL-H/S/Xeon E3 N0/R0/S0) microcode (in intel-06-5e-03/intel-ucode/06-5e-03) from revision 0xdc up to 0xe2; Update of 06-7a-01/0x01 (GLK B0) microcode from revision 0x32 up to 0x34; Update of 06-8e-09/0x10 (AML-Y 2+2 H0) microcode (in intel-06-8e-9e-0x-dell/intel-ucode/06-8e-09) from revision 0xd6 up to 0xde; Update of 06-8e-09/0xc0 (KBL-U/U 2+3e/Y H0/J1) microcode (in intel-06-8e-9e-0x-dell/intel-ucode/06-8e-09) from revision 0xd6 up to 0xde; Update of 06-8e-0a/0xc0 (CFL-U 4+3e D0, KBL-R Y0) microcode (in intel-06-8e-9e-0x-dell/intel-ucode/06-8e-0a) from revision 0xd6 up to 0xe0; Update of 06-8e-0b/0xd0 (WHL-U W0) microcode (in intel-06-8e-9e-0x-dell/intel-ucode/06-8e-0b) from revision 0xd6 up to 0xde; Update of 06-8e-0c/0x94 (AML-Y 4+2 V0, CML-U 4+2 V0, WHL-U V0) microcode (in intel-06-8e-9e-0x-dell/intel-ucode/06-8e-0c) from revision 0xd6 up to 0xde; Update of 06-9e-09/0x2a (KBL-G/H/S/X/Xeon E3 B0) microcode (in intel-06-8e-9e-0x-dell/intel-ucode/06-9e-09) from revision 0xd6 up to 0xde; Update of 06-9e-0a/0x22 (CFL-H/S/Xeon E U0) microcode (in intel-06-8e-9e-0x-dell/intel-ucode/06-9e-0a) from revision 0xd6 up to 0xde; Update of 06-9e-0b/0x02 (CFL-E/H/S B0) microcode (in intel-06-8e-9e-0x-dell/intel-ucode/06-9e-0b) from revision 0xd6 up to 0xde; Update of 06-9e-0c/0x22 (CFL-H/S/Xeon E P0) microcode (in intel-06-8e-9e-0x-dell/intel-ucode/06-9e-0c) from revision 0xd6 up to 0xde; Update of 06-9e-0d/0x22 (CFL-H/S/Xeon E R0) microcode (in intel-06-8e-9e-0x-dell/intel-ucode/06-9e-0d) from revision 0xd6 up to 0xde; Update of 06-3f-02/0x6f (HSX-E/EN/EP/EP 4S C0/C1/M1/R2) microcode from revision 0x43 up to 0x44; Update of 06-55-03/0x97 (SKX-SP B1) microcode from revision 0x1000157 up to 0x1000159; Update of 06-55-06/0xbf (CLX-SP B0) microcode from revision 0x4002f01 up to 0x4003003; Update of 06-55-07/0xbf (CLX-SP/W/X B1/L1) microcode from revision 0x5002f01 up to 0x5003003; Update of 06-5c-09/0x03 (APL D0) microcode from revision 0x38 up to 0x40; Update of 06-5c-0a/0x03 (APL B1/F1) microcode from revision 0x16 up to 0x1e; Update of 06-7a-08/0x01 (GLK-R R0) microcode from revision 0x16 up to 0x18; Update of 06-7e-05/0x80 (ICL-U/Y D1) microcode from revision 0x78 up to 0xa0; Update of 06-a6-00/0x80 (CML-U 6+2 A0) microcode from revision 0xca up to 0xe0. Add a README file to the documentation directory. (BZ#1890355, BZ#1890356, BZ#1893237, BZ#1893242)

Remedy

Before applying this update, make sure all previously released errata<br>relevant to your system have been applied.<br>For details on how to apply this update, refer to:<br><a href="https://access.redhat.com/articles/11258" target="_blank">https://access.redhat.com/articles/11258</a>
First published (updated )

Security Fix(es): hw: Special Register Buffer Data Sampling (SRBDS) (CVE-2020-0543) hw: L1D Cache Eviction Sampling (CVE-2020-0549) hw: Vector Register Data Sampling (CVE-2020-0548) For more details about the security issue(s), including the impact, a CVSSscore, acknowledgments, and other related information, refer to the CVE page(s)listed in the References section.Bug Fix(es): Update Intel CPU microcode to microcode-20200609 release: Update of 06-2d-06/0x6d (SNB-E/EN/EP C1/M0) microcode from revision 0x61f up to 0x621; Update of 06-2d-07/0x6d (SNB-E/EN/EP C2/M1) microcode from revision 0x718 up to 0x71a; Update of 06-3c-03/0x32 (HSW C0) microcode from revision 0x27 up to 0x28; Update of 06-3d-04/0xc0 (BDW-U/Y E0/F0) microcode from revision 0x2e up to 0x2f; Update of 06-45-01/0x72 (HSW-U C0/D0) microcode from revision 0x25 up to 0x26; Update of 06-46-01/0x32 (HSW-H C0) microcode from revision 0x1b up to 0x1c; Update of 06-47-01/0x22 (BDW-H/Xeon E3 E0/G0) microcode from revision 0x21 up to 0x22; Update of 06-4e-03/0xc0 (SKL-U/Y D0) microcode from revision 0xd6 up to 0xdc; Update of 06-55-03/0x97 (SKX-SP B1) microcode from revision 0x1000151 up to 0x1000157; Update of 06-55-04/0xb7 (SKX-SP H0/M0/U0, SKX-D M1) microcode (in intel-06-55-04/intel-ucode/06-55-04) from revision 0x2000065 up to 0x2006906; Update of 06-55-06/0xbf (CLX-SP B0) microcode from revision 0x400002c up to 0x4002f01; Update of 06-55-07/0xbf (CLX-SP B1) microcode from revision 0x500002c up to 0x5002f01; Update of 06-5e-03/0x36 (SKL-H/S R0/N0) microcode from revision 0xd6 up to 0xdc; Update of 06-7e-05/0x80 (ICL-U/Y D1) microcode from revision 0x46 up to 0x78; Update of 06-8e-09/0x10 (AML-Y22 H0) microcode from revision 0xca up to 0xd6; Update of 06-8e-09/0xc0 (KBL-U/Y H0) microcode from revision 0xca up to 0xd6; Update of 06-8e-0a/0xc0 (CFL-U43e D0) microcode from revision 0xca up to 0xd6; Update of 06-8e-0b/0xd0 (WHL-U W0) microcode from revision 0xca up to 0xd6; Update of 06-8e-0c/0x94 (AML-Y42 V0, CML-Y42 V0, WHL-U V0) microcode from revision 0xca up to 0xd6; Update of 06-9e-09/0x2a (KBL-G/H/S/X/Xeon E3 B0) microcode from revision 0xca up to 0xd6; Update of 06-9e-0a/0x22 (CFL-H/S/Xeon E3 U0) microcode from revision 0xca up to 0xd6; Update of 06-9e-0b/0x02 (CFL-S B0) microcode from revision 0xca up to 0xd6; Update of 06-9e-0c/0x22 (CFL-H/S P0) microcode from revision 0xca up to 0xd6; Update of 06-9e-0d/0x22 (CFL-H R0) microcode from revision 0xca up to 0xd6. Do not update 06-4e-03 (SKL-U/Y) and 06-5e-03 (SKL-H/S/Xeon E3 v5) to revision 0xdc, use 0xd6 by default. Enable 06-2d-07 (SNB-E/EN/EP) caveat by default. Enable 06-55-04 (SKL-SP/X/W) caveat by default. Avoid find being SIGPIPE'd on early "grep -q" exit in the dracut script. Re-generate initramfs not only for the currently running kernel, but for several recently installed kernels as well. Change the URL in the intel-microcode2ucode.8 to point to the GitHub repository since the microcode download section at Intel Download Center does not exist anymore.

First published (updated )

Security Fix(es): hw: Special Register Buffer Data Sampling (SRBDS) (CVE-2020-0543) hw: L1D Cache Eviction Sampling (CVE-2020-0549) hw: Vector Register Data Sampling (CVE-2020-0548) For more details about the security issue(s), including the impact, a CVSSscore, acknowledgments, and other related information, refer to the CVE page(s)listed in the References section.Bug Fix(es): Update Intel CPU microcode to microcode-20200609 release: Update of 06-2d-06/0x6d (SNB-E/EN/EP C1/M0) microcode from revision 0x61f up to 0x621; Update of 06-2d-07/0x6d (SNB-E/EN/EP C2/M1) microcode from revision 0x718 up to 0x71a; Update of 06-3c-03/0x32 (HSW C0) microcode from revision 0x27 up to 0x28; Update of 06-3d-04/0xc0 (BDW-U/Y E0/F0) microcode from revision 0x2e up to 0x2f; Update of 06-45-01/0x72 (HSW-U C0/D0) microcode from revision 0x25 up to 0x26; Update of 06-46-01/0x32 (HSW-H C0) microcode from revision 0x1b up to 0x1c; Update of 06-47-01/0x22 (BDW-H/Xeon E3 E0/G0) microcode from revision 0x21 up to 0x22; Update of 06-4e-03/0xc0 (SKL-U/Y D0) microcode from revision 0xd6 up to 0xdc; Update of 06-55-03/0x97 (SKX-SP B1) microcode from revision 0x1000151 up to 0x1000157; Update of 06-55-04/0xb7 (SKX-SP H0/M0/U0, SKX-D M1) microcode (in intel-06-55-04/intel-ucode/06-55-04) from revision 0x2000065 up to 0x2006906; Update of 06-55-06/0xbf (CLX-SP B0) microcode from revision 0x400002c up to 0x4002f01; Update of 06-55-07/0xbf (CLX-SP B1) microcode from revision 0x500002c up to 0x5002f01; Update of 06-5e-03/0x36 (SKL-H/S R0/N0) microcode from revision 0xd6 up to 0xdc; Update of 06-7e-05/0x80 (ICL-U/Y D1) microcode from revision 0x46 up to 0x78; Update of 06-8e-09/0x10 (AML-Y22 H0) microcode from revision 0xca up to 0xd6; Update of 06-8e-09/0xc0 (KBL-U/Y H0) microcode from revision 0xca up to 0xd6; Update of 06-8e-0a/0xc0 (CFL-U43e D0) microcode from revision 0xca up to 0xd6; Update of 06-8e-0b/0xd0 (WHL-U W0) microcode from revision 0xca up to 0xd6; Update of 06-8e-0c/0x94 (AML-Y42 V0, CML-Y42 V0, WHL-U V0) microcode from revision 0xca up to 0xd6; Update of 06-9e-09/0x2a (KBL-G/H/S/X/Xeon E3 B0) microcode from revision 0xca up to 0xd6; Update of 06-9e-0a/0x22 (CFL-H/S/Xeon E3 U0) microcode from revision 0xca up to 0xd6; Update of 06-9e-0b/0x02 (CFL-S B0) microcode from revision 0xca up to 0xd6; Update of 06-9e-0c/0x22 (CFL-H/S P0) microcode from revision 0xca up to 0xd6; Update of 06-9e-0d/0x22 (CFL-H R0) microcode from revision 0xca up to 0xd6. Do not update 06-4e-03 (SKL-U/Y) and 06-5e-03 (SKL-H/S/Xeon E3 v5) to revision 0xdc, use 0xd6 by default. Enable 06-2d-07 (SNB-E/EN/EP) caveat by default. Enable 06-55-04 (SKL-SP/X/W) caveat by default. Avoid find being SIGPIPE'd on early "grep -q" exit in the dracut script. Re-generate initramfs not only for the currently running kernel, but for several recently installed kernels as well. Change the URL in the intel-microcode2ucode.8 to point to the GitHub repository since the microcode download section at Intel Download Center does not exist anymore.

Remedy

<tbody><tr> <th colspan="2">SRPM</th> </tr> <tr> <td class="name"> microcode_ctl-2.1-16.33.el7_3.src.rpm </td> <td class="checksum">SHA-256: e189853c00aaeae6b7dbe6c9fca16ecb0507b504dddf8a812ad58e18f3717636</td> </tr> <tr> <th colspan="2">x86_64</th> </tr> <tr> <td class="name"> microcode_ctl-2.1-16.33.el7_3.x86_64.rpm </td> <td class="checksum">SHA-256: 3718844a8ff3e7f0e3170ab9c519a6f4efa7885a06506591ed7719b323d28c2c</td> </tr> <tr> <td class="name"> microcode_ctl-debuginfo-2.1-16.33.el7_3.x86_64.rpm </td> <td class="checksum">SHA-256: 39463a523f63dd2561366127e3368e54fb0031629ff0d2133714bd96d38f7ae0</td> </tr> </tbody>
First published (updated )

Security Fix(es):<br><li> hw: Special Register Buffer Data Sampling (SRBDS) (CVE-2020-0543)</li> <li> hw: L1D Cache Eviction Sampling (CVE-2020-0549)</li> <li> hw: Vector Register Data Sampling (CVE-2020-0548)</li> For more details about the security issue(s), including the impact, a CVSS score, acknowledgments, and other related information, refer to the CVE page(s) listed in the References section.<br>Bug Fix(es) and Enhancement(s):<br><li> Update Intel CPU microcode to microcode-20200602 release, addresses:</li> <li> Update of 06-2d-06/0x6d (SNB-E/EN/EP C1/M0) microcode from revision 0x61f</li> up to 0x621;<br><li> Update of 06-2d-07/0x6d (SNB-E/EN/EP C2/M1) microcode from revision 0x718</li> up to 0x71a;<br><li> Update of 06-3c-03/0x32 (HSW C0) microcode from revision 0x27 up to 0x28;</li> <li> Update of 06-3d-04/0xc0 (BDW-U/Y E0/F0) microcode from revision 0x2e</li> up to 0x2f;<br><li> Update of 06-45-01/0x72 (HSW-U C0/D0) microcode from revision 0x25</li> up to 0x26;<br><li> Update of 06-46-01/0x32 (HSW-H C0) microcode from revision 0x1b up to 0x1c;</li> <li> Update of 06-47-01/0x22 (BDW-H/Xeon E3 E0/G0) microcode from revision 0x21</li> up to 0x22;<br><li> Update of 06-4e-03/0xc0 (SKL-U/Y D0) microcode from revision 0xd6</li> up to 0xdc;<br><li> Update of 06-55-03/0x97 (SKX-SP B1) microcode from revision 0x1000151</li> up to 0x1000157;<br><li> Update of 06-55-04/0xb7 (SKX-SP H0/M0/U0, SKX-D M1) microcode</li> (in intel-06-55-04/intel-ucode/06-55-04) from revision 0x2000065<br> up to 0x2006906;<br><li> Update of 06-55-06/0xbf (CLX-SP B0) microcode from revision 0x400002c</li> up to 0x4002f01;<br><li> Update of 06-55-07/0xbf (CLX-SP B1) microcode from revision 0x500002c</li> up to 0x5002f01;<br><li> Update of 06-5e-03/0x36 (SKL-H/S R0/N0) microcode from revision 0xd6</li> up to 0xdc;<br><li> Update of 06-7e-05/0x80 (ICL-U/Y D1) microcode from revision 0x46</li> up to 0x78;<br><li> Update of 06-8e-09/0x10 (AML-Y22 H0) microcode from revision 0xca</li> up to 0xd6;<br><li> Update of 06-8e-09/0xc0 (KBL-U/Y H0) microcode from revision 0xca</li> up to 0xd6;<br><li> Update of 06-8e-0a/0xc0 (CFL-U43e D0) microcode from revision 0xca</li> up to 0xd6;<br><li> Update of 06-8e-0b/0xd0 (WHL-U W0) microcode from revision 0xca</li> up to 0xd6;<br><li> Update of 06-8e-0c/0x94 (AML-Y42 V0, CML-Y42 V0, WHL-U V0) microcode</li> from revision 0xca up to 0xd6;<br><li> Update of 06-9e-09/0x2a (KBL-G/H/S/X/Xeon E3 B0) microcode from revision</li> 0xca up to 0xd6;<br><li> Update of 06-9e-0a/0x22 (CFL-H/S/Xeon E3 U0) microcode from revision 0xca</li> up to 0xd6;<br><li> Update of 06-9e-0b/0x02 (CFL-S B0) microcode from revision 0xca up to 0xd6;</li> <li> Update of 06-9e-0c/0x22 (CFL-H/S P0) microcode from revision 0xca</li> up to 0xd6;<br><li> Update of 06-9e-0d/0x22 (CFL-H R0) microcode from revision 0xca up to 0xd6.</li> <li> Change the URL to point to the GitHub repository since the microcode download section at Intel Download Center does not exist anymore.</li> <li> Narrow down SKL-SP/W/X blacklist to exclude Server/FPGA/Fabric segment</li> models.<br><li> Re-generate initramfs not only for the currently running kernel,</li> but for several recently installed kernels as well.

Remedy

<tbody><tr> <th colspan="2">SRPM</th> </tr> <tr> <td class="name"> microcode_ctl-20191115-4.20200602.2.el8_2.src.rpm </td> <td class="checksum">SHA-256: 84ee006c7e5d3dc7b815d844edd915ab41103384612945a1eee57e04db12da7e</td> </tr> <tr> <th colspan="2">x86_64</th> </tr> <tr> <td class="name"> microcode_ctl-20191115-4.20200602.2.el8_2.x86_64.rpm </td> <td class="checksum">SHA-256: 6d2cb329ac92b527f56c151a6acdf1fb5f729fee1a5ca453abf53895ff98decc</td> </tr> </tbody>Red Hat Enterprise Linux for x86_64 - Update Services for SAP Solutions 8.6 <tbody><tr> <th colspan="2">SRPM</th> </tr> <tr> <td class="name"> microcode_ctl-20191115-4.20200602.2.el8_2.src.rpm </td> <td class="checksum">SHA-256: 84ee006c7e5d3dc7b815d844edd915ab41103384612945a1eee57e04db12da7e</td> </tr> <tr> <th colspan="2">x86_64</th> </tr> <tr> <td class="name"> microcode_ctl-20191115-4.20200602.2.el8_2.x86_64.rpm </td> <td class="checksum">SHA-256: 6d2cb329ac92b527f56c151a6acdf1fb5f729fee1a5ca453abf53895ff98decc</td> </tr> </tbody>Red Hat Enterprise Linux for x86_64 - Update Services for SAP Solutions 8.4 <tbody><tr> <th colspan="2">SRPM</th> </tr> <tr> <td class="name"> microcode_ctl-20191115-4.20200602.2.el8_2.src.rpm </td> <td class="checksum">SHA-256: 84ee006c7e5d3dc7b815d844edd915ab41103384612945a1eee57e04db12da7e</td> </tr> <tr> <th colspan="2">x86_64</th> </tr> <tr> <td class="name"> microcode_ctl-20191115-4.20200602.2.el8_2.x86_64.rpm </td> <td class="checksum">SHA-256: 6d2cb329ac92b527f56c151a6acdf1fb5f729fee1a5ca453abf53895ff98decc</td> </tr> </tbody>Red Hat Enterprise Linux for x86_64 - Update Services for SAP Solutions 8.2 <tbody><tr> <th colspan="2">SRPM</th> </tr> <tr> <td class="name"> microcode_ctl-20191115-4.20200602.2.el8_2.src.rpm </td> <td class="checksum">SHA-256: 84ee006c7e5d3dc7b815d844edd915ab41103384612945a1eee57e04db12da7e</td> </tr> <tr> <th colspan="2">x86_64</th> </tr> <tr> <td class="name"> microcode_ctl-20191115-4.20200602.2.el8_2.x86_64.rpm </td> <td class="checksum">SHA-256: 6d2cb329ac92b527f56c151a6acdf1fb5f729fee1a5ca453abf53895ff98decc</td> </tr> </tbody>Red Hat Enterprise Linux for x86_64 - Extended Life Cycle 8.10 <tbody><tr> <th colspan="2">SRPM</th> </tr> <tr> <td class="name"> microcode_ctl-20191115-4.20200602.2.el8_2.src.rpm </td> <td class="checksum">SHA-256: 84ee006c7e5d3dc7b815d844edd915ab41103384612945a1eee57e04db12da7e</td> </tr> <tr> <th colspan="2">x86_64</th> </tr> <tr> <td class="name"> microcode_ctl-20191115-4.20200602.2.el8_2.x86_64.rpm </td> <td class="checksum">SHA-256: 6d2cb329ac92b527f56c151a6acdf1fb5f729fee1a5ca453abf53895ff98decc</td> </tr> </tbody>
First published (updated )

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